Last Updated on : 2025-04-29 08:10:13download
Pulse width modulation (PWM) is an efficient technique for controlling analog circuits using digital outputs from microprocessors.
The figure above shows a PWM waveform with a 100 Hz periodic frequency, featuring a 40% high-level duty cycle and 60% low-level duty cycle. By adjusting the high-level duty cycle value, the analog output level can be modified.
OPERATE_RET tkl_pwm_init(TUYA_PWM_NUM_E ch_id, CONST TUYA_PWM_BASE_CFG_T *cfg);
Features:
Parameters:
ch_id
: The channel ID.
cfg
: The basic PWM configuration, including output polarity, duty cycle, and frequency.
typedef struct {
TUYA_PWM_POLARITY_E polarity;
TUYA_PWM_COUNT_E count_mode;
//pulse duty cycle = duty / cycle; exp duty = 5000,cycle = 10000; pulse duty cycle = 50%
UINT_T duty;
UINT_T cycle;
UINT_T frequency; // (bet: Hz)
} TUYA_PWM_BASE_CFG_T;
polarity
:
Name | Definition |
---|---|
TUYA_PWM_NEGATIVE | The PWM low active output. |
TUYA_PWM_POSITIVE | The PWM high active output. |
count_mode
: The counting mode, including TUYA_PWM_CNT_UP
and TUYA_PWM_CNT_UP_AND_DOWN
.
duty
: The duty cycle, used with cycle
. Output = duty
÷ cycle
.
cycle
: The cycle or granularity. Output = duty
÷ cycle
.
frequency
: The output frequency, in Hz.
Return value:
OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_deinit(TUYA_PWM_NUM_E ch_id);
ch_id
: The channel ID.OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_start(TUYA_PWM_NUM_E ch_id);
ch_id
: The channel ID.OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_stop(TUYA_PWM_NUM_E ch_id);
port
: The port number.OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_multichannel_start(TUYA_PWM_NUM_E *ch_id, UINT8_T num);
ch_id
: The list of channel IDs in the form of an array.num
: The number of channels to be started.OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_multichannel_stop(TUYA_PWM_NUM_E *ch_id, UINT8_T num);
Features:
Parameters:
ch_id
: The list of channel IDs in the form of an array.num
: The number of channels to be stopped.Return value:
OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_info_set(TUYA_PWM_NUM_E ch_id, CONST TUYA_PWM_BASE_CFG_T *info);
ch_id
: The channel ID.info
: The basic PWM configuration, including output polarity, duty cycle, and frequency. The struct parameters are as described above.OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_info_get(TUYA_PWM_NUM_E ch_id, TUYA_PWM_BASE_CFG_T *info);
ch_id
: The channel ID.info
: The basic PWM configuration, including output polarity, duty cycle, and frequency. The struct parameters are as described above.OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_cap_start(TUYA_PWM_NUM_E ch_id, CONST TUYA_PWM_CAP_IRQ_T *cfg);
Features:
Parameters:
ch_id
: The channel ID.
cfg
: The PWM input capture configuration, as detailed below.
cap_mode
:
Name | Definition |
---|---|
TUYA_PWM_CAPTURE_MODE_ONCE | Single trigger mode |
TUYA_PWM_CAPTURE_MODE_PERIOD | Multiple trigger mode |
trigger_level
:
Name | Definition |
---|---|
TUYA_PWM_NEGATIVE | The trigger signal is falling edge. |
TUYA_PWM_POSITIVE | The trigger signal is rising edge. |
clk
: The sampling clock of the captured signal.
cb
: The callback function of the captured signal.
typedef VOID_T (*TUYA_PWM_IRQ_CB)(TUYA_PWM_NUM_E port, TUYA_PWM_CAPTURE_DATA_T data, VOID_T *arg);
typedef struct {
UINT_T cap_value; /* Captured data */
TUYA_PWM_POLARITY_E cap_edge; /* Capture edge, TUYA_PWM_NEGATIVE:falling edge, TUYA_PWM_POSITIVE:rising edge */
} TUYA_PWM_CAPTURE_DATA_T;
arg
: The parameter of the callback function.
Return value:
OPRT_OK
: Success.tuya_error_code.h
.OPERATE_RET tkl_pwm_cap_stop(TUYA_PWM_NUM_E ch_id);
Features:
Parameters:
ch_id
: The channel ID.Return value:
OPRT_OK
: Success.tuya_error_code.h
.void tuya_pwm_test(void)
{
OPERATE_RET ret;
TUYA_PWM_BASE_CFG_T cfg = {.polarity = TUYA_PWM_POSITIVE,\
.duty = 1000,
.cycle = 10000,
.frequency = 1000};
ret = tkl_pwm_init(TUYA_PWM_NUM_0, &cfg);
if (ret != OPRT_OK) {
//Fail
return;
}
ret = tkl_pwm_start(TUYA_PWM_NUM_0);
if (ret != OPRT_OK) {
//Fail
return;
}
tkl_system_delay(5000);
ret = tkl_pwm_info_get(TUYA_PWM_NUM_0, &cfg);
if (ret != OPRT_OK) {
//Fail
return;
}
if(cfg.duty !=5000){
cfg.duty =5000;
}
ret = tkl_pwm_info_set(TUYA_PWM_NUM_0, &cfg);
//Delay
tkl_system_delay(5000);
ret = tkl_pwm_stop(TUYA_PWM_NUM_0);
if (ret != OPRT_OK) {
//Fail
return;
}
ret = tkl_pwm_deinit(TKL_PWM1_CH);
if (ret != OPRT_OK) {
//Fail
return;
}
}
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