NE1 Series Hardware Design Guidelines

About these guidelines

Applicability

These guidelines apply to NE1 modules.

Purposes

These guidelines are intended to serve as the reference when you develop with NE1 series modules. It helps you get an overall understanding of the product specifications and assists in developing IoT products and applications.

This topic describes the hardware design guidelines in terms of features, specifications, reliability tests, test standards, development process, radio frequency (RF) metrics, and circuit designs.

Glossary

Abbreviation	Spelled-out
ESD	Electrostatic discharge
USB	Universal serial bus
UART	Universal asynchronous receiver-transmitter
SIM	Subscriber identification module
SPI	Serial peripheral interface
I2C	Inter-integrated circuit
I/O	Input/Output
GPIO	General-purpose input/output
TBD	To be determined
RTC	Real time clock
ADC	Analog-to-digital converter

Product overview

NE1 series is a family of compact, high-performance, and low-consumption NB-IoT modules. It features:

• Conforming to the NB-IoT radio protocols in 3GPP Release 14
• Frequency bands supported: B3/B5/B8
• Support for both power saving mode (PSM) and extended discontinuous reception (eDRX)
• Abundant external interfaces including SIM card (3V/1.8V), UART, SPI, I2C, and GPIO

Module appearance

Package dimensions

NE1 is equipped with a total of 66 pins, including 52 LCC pins and 14 LGA pins. It has an ultra-compact profile of 17.7 mm (L) x 15.8 mm (W) x 2.4 mm (H).

Features

The following table describes the detailed features of NE1 in terms of physical characteristics, baseband, RF, technical standards, and environmental specifications.

Key features

Items	Parameters	Details
Physical characteristics	Dimensions and packages	NE1 is equipped with a total of 66 pins, including 52 LCC pins and 14 LGA pins. It has an ultra-compact profile of 17.7 mm (L) x 15.8 mm (W) x 2.4 mm (H).
Module	Platform	EC616
Module	Processor architecture	Cortex-M3
Module	USIM	3V/1.8V SIM card
Module	Voltage	Supply voltage: 2.2V to 4.5V Typical supply voltage: 3.3V
Module	Operating mode	Active: The module is in the active status. All functions of the module are available, and all processors are active. Radio transmission and reception can be performed. Transitions to Idle mode or PSM can be initiated. Idle: The module is in the light sleep status, network connection is maintained, and paging messages can be received. Transitions to Active mode or PSM can be initiated. PSM: The module is in the deep sleep status and only the RTC is working. The network is disconnected and thus paging messages cannot be received. After the timer expires, the module is woken up. Alternatively, pull down Reset or PSM_EINT to wake up the module from PSM.
Module	Power saving	The module consumes an ultra-low current (typically 800 nA) in PSM. PSM is designed to reduce the power consumption of the module and improve battery life.
Module	UART interfaces	Download port: used for AT command communication and data transmission. The baud rate is 115200 bps by default. When the port is used for the firmware update, the baud rate is 921600 bps by default. User port: used for communicating with a microcontroller by using Tuya’s serial protocol. Logging port: used for firmware debugging and log printing.
Module	ADC	The module provides a 10-bit ADC input channel to read the voltage value. The interface is available in Active and Idle mode.
Module	Network status indication	This pin keeps in high level in Active and Idle mode and in low level during module’s power-off or in PSM.
RF	Protocol	Conforming to the NB-IoT radio protocols in 3GPP Release 14
RF	Max transmitting power	23 dBm ± 2 dB
RF	Receiving sensitivity	-127.3 dBm/15 kHz (non-retransmit)
RF	Antenna interface	50Ω impedance control. The antenna is supplied by a third party.
Technical standards	Data transmission	Single-tone: 25.5 kbps (downstream)/16.7 kbps (upstream). Multi-tone: 25.5 kbps (downstream)/62.5 kbps (upstream).
Technical standards	Network protocols	UDP/TCP/CoAP/LwM2M/PPP*/SSL*/DTLS*/FTP*/HTTP*/MQTT*/HTTPS*
Environmental specifications	Temperature	Operation temperature range: -35°C to +75°C 1 Extended temperature range: -40°C to +85°C 2 Storage temperature range: -40°C to +90°C
Applications	SMS messages*	Text and PDU mode
Applications	Firmware update	Update firmware via main UART port. For OTA updates, consider the update time and battery level.

Feature description

Baseband feature

The signal groups in the baseband include SIM card interface, I2C interface, UART interfaces, network status indication, reset key, PSM wake-up, GPIO interfaces, power supply, and GND.

RF feature

Operating frequencies

Operating frequencies	Upstream frequencies	Downstream frequencies
B3	1710 MHz to 1785 MHz	1805 MHz to 1880 MHz
B5	824 MHz to 849 MHz	869 MHz to 894 MHz
B8	880 MHz to 915 MHz	925 MHz to 960 MHz

RF conducted output power

Frequency bands	Max	Min
B3	23 dBm ± 2 dB	< -39 dBm
B5	23 dBm ± 2 dB	< -39 dBm
B8	23 dBm ± 2 dB	< -39 dBm

RF receiving sensitivity

Frequency bands	Conducted receiving sensitivity
B3/B5/B8	-127.3 dBm/15 kHz (non-retransmit)

Working mode

The following table describes the three operating modes of the module.

Modes	Description
Connected	Connected: Active status. The module is in this status after it is activated and connected to the network. Radio transmission and reception can be performed. If no data communication is detected for a specified time, transition to Idle mode can be initiated.
Idle	Idle: Light Sleep status. The network connection is maintained in eDRX state. Paging messages can be received. If no data communication is detected for a specified time, transition to PSM can be initiated.
PSM	PSM: Deep Sleep status. CPU is powered off, the network is disconnected. Paging messages cannot be received. The module consumes an ultra-low current. The PMS duration is set by the T3412 timer. When there is upstream data to be transmitted or the tracking area update (TAU) expires, the module enters Connected mode.

Power saving mode (PSM)

The module consumes an ultra-low current (typically 800 nA) in PSM. PSM is designed to reduce the power consumption of the module and improve battery life. The following figure shows the power consumption of the module in different modes.

The procedure for entering PSM is as follows:

• The module requests to enter PSM in Attach Request message during attach or TAU procedure. Then the network accepts the request and provides values of T3324 and T3412 timers to the module and the mobile reachable timer starts. When the T3324 timer expires, the module enters PSM.
• The module cannot request PSM when it is establishing an emergency attachment or initializing the public data network (PDN) connection.
• When the module is in PSM, it cannot be paged and stops access stratum activities such as cell re-selection. But T3412 is still active.

Either of the following methods can make the module exit from PSM:

• After the T3412 timer expires, the module will exit PSM automatically.
• Pulling down PSM_EINT (falling edge) will wake the module up from PSM.

Pin configuration and functions

Pin description

I/O parameters definition

Type	Description
I	Input
O	Output
IO	Input/Output

Pin out

The NE1 pin out is as follows.

Pin description

Pin number	Symbol	I/O types	Feature	Notes
1	GND	–	GND	–
2	GPIO1	I	GPIO1 (boot flag)	1.8V power domain. Pull down this pin in download mode.
3	SPI_MISO	I	GPIO14 (Controller in and agent out)	1.8V power domain. Only the peripheral mode is supported.
4	SPI_MOSI	O	GPIO11 (Controller out and agent in)	1.8V power domain. Only the peripheral mode is supported.
5	SPI_SCLK	O	GPIO15 (Serial clock)	1.8V power domain. Only the peripheral mode is supported.
6	SPI_CS	O	GPIO16 (Chip select)	1.8V power domain. Only the peripheral mode is supported.
7	NC	-	NC
8	GPIO10	I/O	GPIO10	Normal GPIO pin
9	ADC0	I	ADC interface AIO2	12-bit AUXADC
10	SIM_GND	–	Specified ground for SIM card	–
11	SIM_DATA	–	SIM card data signal	Adding a 20 kΩ pull-up resistor is recommended.
12	SIM_RST	–	SIM card reset signal	–
13	SIM_CLK	–	SIM card clock signal	–
14	SIM_VCC	–	SIM card power supply	1.8/3.0V
15	RESET	I	Reset the module.	3.3V power domain. Active low. Adding a 20 kΩ pull-up resistor and RC filter is recommended.
16	NETLIGHT	I/O	GPIO19	A normal GPIO pin. In generic firmware v2.0.4 and later releases, this pin cannot be used for network status indication. You can implement network activity indication on the MCU.
17	UART1_RXD	I	The main UART interface used for receiving AT commands and serial data.	1.8V power domain. If the voltage range of the MCU’s TXD is 1.8V to 3.6V, directly connecting the MCU’s TXD to the module’s RXD is recommended.
18	UART1_TXD	O	The main UART interface used for transmitting AT commands and serial data.	1.8V power domain. Take care of level translation.
19	PSM_EINT	I	WAKEUP3, a dedicated external interrupt pin, used to wake up the module from PSM.	3.3V power domain. Falling edge active. Adding a 20 kΩ pull-up resistor and RC filter is recommended.
20	RI	–	GPIO7	Normal GPIO pin
21	WAKEUP1	I	WAKEUP1, a dedicated external interrupt pin, used to wake up the module from PSM.	3.3V power domain. Falling edge active. Adding a 20 kΩ pull-up resistor and RC filter is recommended.
22	WAKEUP2	I	WAKEUP2, a dedicated external interrupt pin, used to wake up the module from PSM.	3.3V power domain. Falling edge active. Adding a 20 kΩ pull-up resistor and RC filter is recommended.
23	NC	–	NC	–
24	VIO18_EXT	O	1.8V output power supply. No voltage output in PSM.	Vmin=1.53V Vnorm=1.8V
25	WAKEUP5	I	WAKEUP5, a dedicated external interrupt pin, used to wake up the module from PSM.	3.3V power domain. Falling edge active. Adding a 20 kΩ pull-up resistor and RC filter is recommended.
26	WAKEUP4	I	WAKEUP4, a dedicated external interrupt pin, used to wake up the module from PSM.	3.3V power domain. Falling edge active. Adding a 20 kΩ pull-up resistor and RC filter is recommended.
27	GND	–	GND	–
28	UART2_RXD	I	Receive data through serial communication by default.	1.8V power domain. Take care of level translation.
29	UART2_TXD	O	Transmit data through serial communication by default.	1.8V power domain. Take care of level translation.
30	NC	–	NC	–
31	NC	–	NC	–
32	I2C0_SDA	I/O	I2C0_Data/GPIO9	I2C interface by default.
33	I2C0_SCL	O	I2C0_Clock/GPIO17	I2C interface by default.
34	GND	–	GND	–
35	RF_ANT	–	RF_Antenna	50Ω characteristic impedance
36 and 37	GND	–	GND	–
38	UART0_RXD	I	Receive data	Used for log output by default. 1.8V power domain. Take care of level translation.
39	UART0_TXD	O	Transmit data	Used for log output by default. 1.8V power domain. Take care of level translation.
40 and 41	GND	–	GND	–
42 and 43	VBATT	I	Input power	Input voltage range: 2.2V to 4.3V. Vnorm: 3.3V. Mount a TVS diode on the motherboard for ESD protection.
44	NC	–	NC	–
45	NC	–	NC	–
46	NC	–	NC	–
47	NC	–	NC	–
48	NC	–	NC	–
49	NC	–	NC	–
50	NC	–	NC	–
51	NC	–	NC	–
52	NC	–	NC	–
53	NC	–	NC	–
54	NC	–	NC	–
55	NC	–	NC	–
56	NC	–	NC	–
57	NC	–	NC	–
58	NC	–	NC	–
59	SWDIO	–	The debug interface	–
60	NC	–	NC	–
61	NC	–	NC	–
62	SWCLK	–	The debug interface	–
63	NC	–	NC	–
64	FREF	–	The base frequency	–
65	GPIO6	–	GPIO6	Normal GPIO pin
66	GND	–	GND	–

Power supply pins

Pin description

NE1 can be powered by a battery or an external power supply. The ground pin and signal ground pin must be connected to the ground plane on the PCB. Otherwise, the overall performance of the module might be affected.

Pin No.	Signal	Description	Min	Typical	Max	Unit
42 and 43	VBAT	Input power	2.2	3.3	4.5	V
1, 27, 34, 36, 37, 40, and 41	GND	GND	–	–	–	–

Power supply requirements

The supply voltage of the module ranges from 2.2V to 4.5V. You can use a low quiescent current LDO with an output current capacity of 0.5A as the power supply. A LiMnO2 battery can also be used as the power supply.

• Voltage drop: When the module is working, make sure its input voltage will never drop below 2.2V. Otherwise, the module cannot work properly.
• Voltage regulator and filter capacitor: It is recommended to place a 100 μF tantalum capacitor with low ESR (ESR < 0.7Ω) and three ceramic capacitors (100 nF, 100 pF 0402, and 22 pF 0402) near the VBAT pins.
• Electrostatic discharge protection: Add a TVS diode on the VBAT trace (near VBAT pins) to improve surge voltage withstand capability.
• In principle, the longer the VBAT trace is, the wider it should be.

A reference circuit for the power supply is illustrated in the following figure.

Reset/PSM exit

Pin description

Pin No.	Signal	Description
15	RESET	Reset the module.
19	PSM_EINT	A dedicated external interrupt pin, used to wake up the module from PSM.

Applications

• Reset: The module will be reset after the RESET pin is driven to a low level for at least 35 ms and then pulled up or left floating.

• PSM exit: Pulling down PSM_EINT (falling edge) will wake the module up from PSM. A low pulse width of at least 4 ms is required, as shown in the timing diagram below. If a triode is used to wake up the module, the output pin must not be pulled up. When MCU’s GPIO wakes up the module, use an open-drain output pin. Otherwise, the supply voltage drop might be mistaken for low-level output.

  

• Pull down RESET or PSM_EINT to wake up the module from PSM.

1. An open drain/collector driver is recommended, as shown in the following schematics.

   

2. Use a button to control module wake-up.

   

UART interfaces

Pin description

The module provides three UART interfaces:

• Download port: used for firmware update and AT command communication. The baud rate is 115200 bps by default and is 921600 bps when the port is used for firmware update.
• User port: used for communicating with an external microcontroller. The baud rate can be 115200 bps or 9600 bps.
• Logging port: used for firmware debugging and log printing.

Pin No.	Signal	Description
17	UART1_RXD	Receive firmware updates.
18	UART1_TXD	Transmit firmware updates.
28	UART2_RXD	The user port for receiving data.
29	UART2_TXD	The user port for transmitting data.
38	UART0_RXD	The logging port for receiving data.
39	UART0_TXD	The logging port for transmitting data.

Applications

The module provides 1.8V UART interfaces. A level translator should be used if the application is equipped with a 3.3V UART interface. Take a level translator UM3202 as an example to show the reference design.

Alternatively, use a triode to translate voltage levels.

SIM card interface

Pin description

Pin No.	Pin name	Description	Notes
11	SIM_DATA	Data signal of SIM card	Voltage accuracy: 1.8V±5%. Maximum supply current: about 60 mA.
13	SIM_CLK	Clock signal of SIM card	Voltage accuracy: 1.8V±5%. Maximum supply current: about 60 mA.
12	SIM_RST	Reset signal of SIM card	Voltage accuracy: 1.8V±5%. Maximum supply current: about 60 mA.
14	SIM_VDD	SIM card power supply	Voltage accuracy: 1.8V±5%. Maximum supply current: about 60 mA.

Applications

Circuit design

• Place the SIM card connector near the module. Keep the trace length as less than 200 mm as possible.
• Place a 1 μF decouple capacitor between SIM_VDD and GND, close to the SIM card connector.
• Place a 10 to 20 KΩ pull-up resistor on the SIM_DATA.
• Place the RF bypass capacitors (33 pF) close to the SIM card connector on all signal traces (SIM_DATA, SIM_RST, and SIM_CLK) to improve EMI suppression.
• Keep SIM card signals away from RF and VBAT traces. To avoid crosstalk between SIM_DATA and SIM_CLK, keep them away from each other.
• In order to offer good ESD protection, it is recommended to add a TVS diode array with a parasitic capacitance of less than 50 pF. The ESD protection device should be placed as close to the SIM card connector as possible, and make sure the SIM card signal lines go through the ESD protection device first and then to the module.

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SPI interface

Pin description

Pin No.	Signal	Description
3	SPI_MISO	Controller in and agent out
4	SPI_MOSI	Controller out and agent in
5	SPI_ SCLK	SPI serial clock signal
6	SPI_CS	SPI chip select

Applications

The module provides 1.8V SPI interface. A level translator should be used if the application is equipped with a 3.3V UART interface.
A reference circuit is illustrated in the following figure.

I2C bus

Pin description

Pin No.	Signal	Description
32	SDA	I2C serial data line
33	SCL	I2C serial clock line

I2C is a simple serial communication bus protocol that uses just two bus wires, a serial data wire (SDA) and a serial clock wire (SCL). I2C is integrated into many ICs and allows devices to communicate directly with each other. Each device is recognized by a unique address to differentiate from other devices on the same I2C bus and can operate either as a transmitter or a receiver depending on its function.

Applications

Network status indication

Netlight interface

Pin No.	Signal	Description
16	NETLIGHT	This pin keeps in high level in Connected and Idle status and in low level in discharging or PSM.

Applications

Antenna interface

Pin description

Pin No.	Signal	Description
35	RF_ANT	50Ω characteristic impedance

Antenna matching circuit

In order to achieve better RF performance, it is recommended to place the π-type matching components as close to the antenna as possible.
By default, the capacitors (C10/C23) are not mounted and a 0Ω resistor is mounted on L1. It is recommended to reserve a port on the antenna to mount a TVS diode.

RF layout

For your MCU PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. A microstrip line is used for impedance control.
Microstrip line design on PCB

Principles in RF layout design:

• The distance between the RF pins and the RF connector should be as short as possible. All the right angle traces should be changed to 135° or curved ones.
• The reference ground of RF traces should be complete. Add some ground vias around RF traces. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces.
• The GND pins are adjacent to RF pins and should be fully connected to the ground.
• There should be a distance between the pad connected to the signal pin and the ground plane.
• Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω.

The following figure provides parameters used for impedance control. You can adjust the trace width properly to get the trace impedance closer to 50Ω.

Antenna requirements

Antenna cable insertion loss requirements

Frequency bands	Prerequisites
B5/B8	Cable insertion loss: < 1 dB
B3	Cable insertion loss: < 1.5 dB

Antenna parameters requirements

Parameter	Prerequisites
Frequency bands	Vary depending on the requirements of the local operators.
Voltage standing wave ratio (VSWR)	≤ 2
Efficiency	≥ 30%
Max input power (W)	50
Input impedance (Ω)	50
Polarization	Linear polarization

Antenna design requirements

• The antenna should be kept away from components that are more likely to generate EMI, such as power source and data line.
• To maximize the RF performance, the distance between the antenna and the PCB or mental materials should be at least 15 mm.
• Make sure that the enclosure surrounding the antenna is not metal materials. Otherwise, the radiation performance might be degraded. It is recommended to hollow out the breakout board around the antenna area.

Antenna types

This module does not come with an antenna, so an external antenna is required. You can choose one from the external rubber antenna, helical antenna, FPC antenna with IPEX connector, and PCB antenna. The antenna type can be monopole, planar inverted-F antenna (PIFA), inverted-F antenna (IFA), loop, and more.
The following figure shows the common antennas.

Rubber antenna

FPC antenna with IPEX connector

Built-in FPC antenna

Reliability design

EMC and ESD suppression design guide

Electromagnetic compatibility (EMC) is one of the essential considerations in designing for signal integrity and power integrity.

• When you design the peripheral circuit, have two times the width of the trace when routing signals close to each other to minimize noise coupling and generation.
• Place decoupling capacitors close to voltage pins. Keep the high-frequency and high-speed circuits and sensitive circuits away from the edge of the PCB. To reduce crosstalk between signals, increase the spacing between the traces. Provide shielding for components that emit RFI and EMI waves to protect sensitive signals from interference.

Design considerations for ESD circuit protection.

• Place ESD protection devices close to the critical signal I/Os, such as the SIM card.
• In PCB layout and design, make sure the metal shielding enclosure is fully connected to the ground.

PCB pad design

It is recommended to design the 14 pads placed in the middle of the PCB as per the dimensions specified in the structure diagram. Extend the 52 pads around the PCB to the module for over 0.3 mm and the other three sides of the pads for 0.05 mm.

Thermal design

The module generates heat when it works or might be affected by high-temperature components. The module design ensures good heat dissipation. When connecting the module to the PCB, connect the thermal pad to the ground properly to ensure thermal conduction and balance and better electrical performance.

Packing and manufacturing

Mechanical dimensions

NE1 is equipped with a total of 66 pins, including 52 LCC pins and 14 LGA pins.
The dimensions are 17.7±0.35 mm (L) x 15.8±0.35 mm (W) x 2.4±0.15 mm (H), as shown below.

Side view

Pin out

SMT package

Top/bottom View