LZ5x1 Series Hardware Design Guidelines

Last Updated on : 2023-03-12 13:37:22download

These guidelines are intended to serve as the reference when you develop with LZ5x1 series modules. It helps you get an overall understanding of the product specifications and assists in developing IoT products and applications.

This topic describes the hardware design guidelines in terms of features, specifications, reliability tests, test standards, development process, radio frequency (RF) metrics, and circuit designs.

Background

Reference

Glossary

Abbreviation Spelled-out
ESD Electrostatic discharge
USB Universal serial bus
UART Universal asynchronous receiver-transmitter
SIM Subscriber identification module
SPI Serial peripheral interface
I2C Inter-integrated circuit
I/O Input/Output
GPIO General-purpose input/output
TBD To be determined
RTC Real time clock
ADC Analog-to-digital converter

Product overview

The LZ5x1 series is a family of LTE Cat.1 cellular modules from Tuya Smart. The LZ5x1 module consists of a highly integrated LTE Cat.1 chip UIS8910DM and peripheral circuits. It has a built-in LTE Cat.1 network communication protocol stack and library functions.

The LZ5x1 module is built around an Arm Cortex-A5 processor and Cat.1 bis modem and embedded with 64 MB NOR flash and 128 MB PSRAM. It provides a wide array of interfaces including USB, UART, I2C, I2S, and ADC for supporting peripherals such as the display, camera, keyboard matrix circuit, microphone, speaker, earphone, charger, and USIM card.

Models

Frequency bands LZ501-CN
LTE FDD Band 1, 3, 5, 8
LTE TDD Band 34, 38, 39, 40, 41
GSM Not supported.
GNSS Not supported.
Bluetooth Low Energy 4.2 Support
Wi-Fi Scan Support

Features

Feature Description
Processor Arm Cortex-A5 500 MHz microprocessor
Voltage
  • Operating voltage: 3.4V to 4.3V
  • Typical operating voltage: 3.8V
SIM card Dual SIM card support.
1.8V or 3V supported.
LTE-FDD Cat.1 speed Maximum download speed of 10 Mbps
Maximum upload speed of 5 Mbps
LTE-TDD Cat.1 speed Maximum download speed of 8.2 Mbps
Maximum upload speed of 3.4 Mbps
Bluetooth Bluetooth Low Energy 4.2. Pairing over Bluetooth is not stable currently. It is recommended to set pairing with QR code as the preferred mode.
Wi-Fi Only Wi-Fi scan is supported, used for indoor positioning.
Antenna interface Support antennas for protocols and standards including LTE, Bluetooth Low Energy, and Wi-Fi.
Port 1 USB 2.0 port, 3 UART ports, 1 I2C port, 1 PCM/I2C port, and 2 ADC ports.
Display SPI display in 320 × 240 pixel resolution at 30 fps
Camera SPI/MIPI camera in 640 × 480 pixel resolution
Keyboard 4 × 5 keyboard matrix
Audio 1-channel microphone, 1-channel speaker, and 1-channel earphone.
Power supply by lithium battery Support
Operating temperature
  • Operation temperature range: -30°C to +75°C 1
  • Extended temperature range: -40°C to +85°C 2
Software updates USB update or OTA update
  • 1 Within the operation temperature range, the module is 3GPP compliant.
  • 2 Within the extended temperature range, the module remains the ability to operate properly. Only the values of one or more parameters like output power might exceed the specified tolerances of 3GPP specifications.

Appearance

LZ5x1 Series Hardware Design Guidelines LZ5x1 Series Hardware Design Guidelines

Pin configuration and functions

LZ5x1 is equipped with a total of 101 pins, including 50 LCC pins and 51 LGA pins.

The pinout is as follows:

LZ5x1 Series Hardware Design Guidelines

I/O parameters definition

Type Description
PI Power input
PO Power output
I Input
O Output
I/O Input/Output
AI Analog input

Pin description

Pin No. Pin name I/O type Description
1 and 2 GND - The ground pin.
3 ANT_MAIN I/O The main antenna.
4 and 5 GND - The ground pin.
6 NC - -
7 and 8 GND - The ground pin.
9 and 10 VBAT PI Power supply for module RF part.
Supply voltage: 3.4V to 4.3V.
11 USB_DM I/O USB high-speed differential transceiver (negative).
12 USB_DP I/O USB high-speed differential transceiver (positive).
13 VDD_EXT PO The digital level. 1.8V voltage output.
14 PWRKEY I Power on or off the system.
Active low.
15 USIM2_DATA I/O USIM2 data signal. It can be used as GPIO30 in OpenCPU mode.
16 USIM2_CLK O USIM2 clock signal. It can be used as GPIO29 in OpenCPU mode.
17 USIM2_RST O USIM2 reset signal. It can be used as GPIO31 in OpenCPU mode.
18 UART1_RXD I UART 1 receive data.
It is a 1.8V UART pin that can be connected to an external MCU.
19 UART1_TXD O UART 1 transmit data.
1.8V UART interface that can be connected to an external MCU.
20 UART1_RTS I UART 1 request to send. It can be used as GPIO19 in OpenCPU mode.
21 UART1_CTS O UART 1 clear to send. It can be used as GPIO18 in OpenCPU mode.
22 GPIO26 I/O GPIO26
23 USIM1_DATA I/O USIM1 data signal
24 USIM1_CLK O USIM1 clock signal
25 USIM1_RST O USIM1 reset signal
26 USIM1_VDD PO USIM1 power supply
27 USIM1_DET I USIM card insertion detection. If it is unused, pull it up to VDD_EXT with an external resistor.
28 MIC_N I Microphone input signal (negative).
29 MIC_P I Microphone input signal (positive).
30 MIC_BIAS PO Microphone bias voltage. This pin is not internally connected. If an external microphone is used, this pin must be connected to the MIC signal.
31 USB_VBUS PI Detect USB insertion.
32 AMP_COMP - The ground pin.
33 HP_R O Right channel output for headphone.
34 HP_L O Left channel output for headphone.
35 SPK_P O Speaker positive output.
36 SPK_N O Speaker negative output.
37 RESET I Reset the module. Active low.
38 NET_STATUS* O Indicate the module network activity status. It can be used as GPIO9 in OpenCPU mode.
39 UART2_RXD I UART 2 receive data.
It is a 1.8V UART pin.
40 UART2_TXD O UART 2 transmit data.
It is a 1.8V UART pin.
41 WAKEUP_IN I External circuit wakes up the module. It can be used as GPIO10 in OpenCPU mode. If it is unused, keep it open.
42-51 GND - The ground pin.
52 I2C2_SDA I/O I2C data signal. It can be used as GPIO17 in OpenCPU mode.
53 KEYOUT0 I/O Key output 0.
54 LCD_CLK O SPI LCD clock signal
55 GND - The ground pin.
56 I2C2_SCL I/O I2C clock signal. It can be used as GPIO16 in OpenCPU mode.
57 GND - The ground pin.
58 LCD_SIO O SPI LCD data signal
59 ADC3 AI Analog to digital converter interface 3.
60 GND - The ground pin.
61 WAKEUP_OUT* O The module wakes up the external circuit. It can be used as GPIO5 in OpenCPU mode. If it is unused, keep it open.
62 LCD_SDC O SPI LCD data command selection
63 GND - The ground pin.
64 ADC2 AI Analog to digital converter interface 2.
65 GND - The ground pin.
66 GND - The ground pin.
67 ISENSE I Measure the charge current.
68 GND - The ground pin.
69 LCD_CS O SPI LCD chip select
70 GND - The ground pin.
71 USBBOOT I/O Key input 0. Pulling up this pin to VDD_EXT before power-on will force the module to enter USB download mode.
72 VBAT_SENSE I Measure battery voltage. Connect it close to the positive terminal of batteries to sense the battery voltage. If the battery is not used, connect this pin to the VBAT pin. Otherwise, the module will keep restarting.
73 VDRV O Enable the charger circuit.
74 LCD_RSTB O SPI LCD reset signal
75 KEYOUT1 I/O Key output 1.
76 KEYOUT2 I/O Key output 2.
77 UART3_RXD/KEYOUT4 I UART 3 receive data. It is a 1.8V UART pin that can be used as KEYOUT4.
78 UART3_TXD/KEYOUT5 O UART 3 transmit data. It is a 1.8V UART pin that can be used as KEYOUT5.
79 CAM_PWDN IO Camera CAM_PWDN signal
80 CAM_REFCLK O Camera CAM_REFCLK signal
81 HEADMIC_BIAS PO Headphone microphone bias voltage. This pin is not internally connected. If an external microphone is used, this pin must be connected to the HEADMIC signal.
82 PCM_DOUT O PCM data output. It can be used as GPIO3 in OpenCPU mode.
83 PCM_CLK I/O PCM audio clock signal. It can be used as GPIO0 in OpenCPU mode.
84 PCM_SYNC I/O PCM data sync. It can be used as GPIO1 in OpenCPU mode.
85 PCM_DIN I PCM data input. It can be used as GPIO2 in OpenCPU mode.
86 GND - The ground pin.
87 KEYOUT3 I/O Key output 3.
88 KEYIN3 I/O Key input 3.
89 CAM_SCK I/O Camera CAM_SCK signal
90 CAM_SI1 I/O Camera CAM_SI1 signal
91 CAM_SI0 I/O Camera CAM_SI0 signal
92 CAM_RSTL I/O Camera CAM_RSTL signal
93 DBG_TXD I Debugging interface, used for the module to transmit data.
94 DBG_RXD O Debugging interface, used for the module to receive data.
95 USIM2_VDD PO USIM2 power supply
96 ANT_BT/WIFI I/O Bluetooth and Wi-Fi antenna.
97 WHTLED_IB0 O RGB LED current input 1, which is configurable in OpenCPU mode. Imax = 54 mA
98 NET_MODE PI Indicate the module network registration. Quick blinking indicates the module is searching for the network. Slow blinking indicates the module is connected to the cloud.
99 HEADMIC_P I Headphone microphone input (positive)
100 HEADMIC_N I Headphone microphone input (negative)
101 KEYIN4 I/O Key input 4.

Power supply

Power and ground pins

LZ5X1 can be powered by a battery or an external power supply. The ground pin and signal ground pin must be connected to the ground plane on the PCB. Otherwise, the overall performance of the module might be affected.

Pin No. Signal Description Min Typical Max Unit
9 and 10 VBAT Power supply for module RF part. 3.4 3.8 4.3 V
1 to 2, 4 to 5, 7 to 8, 42 to 51, 55, 57, 60, 63, 65 to 66, 68, 70, 86 GND Ground pin. - - - -

Power supply requirements

  • The supply voltage of the LZ5X1 module ranges from 3.4V to 4.3V, with a peak current of 2A.

    • If the difference between the input and output voltage is small, you can use a low-dropout (LDO) regulator to maintain the required system voltage.
    • If the difference between the input and output voltage is large, you can use a DC-to-DC converter to regulate the output voltage.
  • Voltage drop: When the module is working, make sure its input voltage will never drop below 3.4V and the ripple voltage is less than 300 mV.

    LZ5x1 Series Hardware Design Guidelines
  • Voltage regulator and filter capacitor:

    • Capacitors used for the voltage regulation circuit of a power supply: 100 μF × 2, 10 μF
    • Filter capacitors on digital signals: 1 μF, 0.1 μF
    • Filter capacitors on high-frequency signals: 33 pF, 10 pF
  • Electrostatic discharge protection: Add a TVS diode on the VBAT trace (near VBAT pins) to improve surge voltage withstand capability.

  • In principle, star routing topology is required. The longer the VBAT trace is, the wider it should be.

  • If the module is powered by a battery, you can enable low voltage (less than 3.38V) shutdown, with consideration of the power of other components on the backplane. Otherwise, the module might not be powered on due to battery over-discharge.

A reference circuit for the power supply is illustrated in the following figure.

LZ5x1 Series Hardware Design Guidelines

Power on/reset

Pin description

Pin No. Signal Description
14 PWRKEY Power on the module.
37 RESET Reset the module.

Applications

  • Power on: The module will be powered on after the PWRKEY pin is driven to a low level for at least 1.5 seconds and then pulled up or left floating.

    LZ5x1 Series Hardware Design Guidelines
  • If you want the module to be powered on whenever a power source is connected and do not need the shutdown feature, you can pull down PWRKEY to ground through a 4.7 kΩ resistor.

  • Reset: The module will be reset after the RESET pin is driven to a low level for at least 35 ms and then pulled up or left floating.

    LZ5x1 Series Hardware Design Guidelines
  • An open drain/collector driver is recommended, as shown in the following schematics.

    • Power-on circuit
    LZ5x1 Series Hardware Design Guidelines
    • Reset circuit
    LZ5x1 Series Hardware Design Guidelines

UART interface

Pin description

The module provides three UART interfaces:

  • UART 1: used to connect to your MCU. The serial data transmission follows Tuya’s protocol. The baud rate is 115200 bps by default.

  • UART 2: used to connect to peripheral devices.

  • UART 3: used to connect to peripheral devices.

    Pin No. Signal Description
    18 UART1_RXD UART 1 receive data.
    19 UART1_TXD UART 1 transmit data.
    21 UART1_CTS UART 1 clear to send.
    20 UART1_RTS UART 1 request to send.
    39 UART2_RXD UART 2 receive data.
    40 UART2_TXD UART 2 transmit data.
    77 UART3_RXD UART 3 receive data.
    78 UART3_TXD UART 3 transmit data.

Applications

LZ5x1 Series Hardware Design Guidelines

The module provides 1.8V UART interfaces. A level translator should be used if the application is equipped with a 3.3V or 5V UART interface.

Circuit diagram

LZ5x1 Series Hardware Design Guidelines

Alternatively, use a triode to translate voltage levels.

LZ5x1 Series Hardware Design Guidelines

See the circuit diagram above for how UART 1, UART 2, and UART 3 are connected.

USB interface

Pin description

The USB interface conforms to USB 2.0 specifications and can be used to download code to the module.

Pin No. Signal Description
12 USB_DP USB high-speed differential transceiver (positive). It can be used to download code to the module.
11 USB_DM USB high-speed differential transceiver (negative). It can be used to download code to the module.
31 USB_VBUS Data signal of USIM card.
71 USBBOOT Pulling up this pin to VDD_EXT before power-on will enable the module to enter USB download mode.

Applications

  • MCU solutions

    LZ5x1 Series Hardware Design Guidelines
  • Micro-USB cable

    LZ5x1 Series Hardware Design Guidelines

Circuit design

  • Pull up USBBOOT to VDD_EXT to make the module enter USB download mode.

  • Make sure to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90Ω.

  • Do not route signal traces under the power supply, RF signal traces, and other sensitive signal traces. It is important to route the USB differential traces in the inner layer with ground shielding on not only the upper and lower layers but also the right and left sides.

  • Connect a common mode choke between the MCU and module in series to improve EMI suppression.

  • VBUS is used to detect the presence of the USB bus. If the USB port on your MCU does not support the suspend mode, you can disconnect VBUS to make the module enter sleep mode.

    LZ5x1 Series Hardware Design Guidelines
  • Considering connection to micro-USB devices, place the TVS diode as close to the USB port as possible with a parasitic capacitance of less than 2 pF.

SIM card interface

Pin description

Pin No. Signal Description
27 USIM1_DET USIM card insertion detection. If it is unused, pull it up to VDD_EXT.
26 USIM1_VDD Power supply for USIM card. Either 1.8V or 3.0V is supported by the module automatically.
23 USIM1_DATA Data signal of USIM card.
24 USIM1_CLK USIM card clock signal.
25 USIM1_RST Reset signal of the USIM card.
95 USIM2_VDD Power supply for USIM card. Either 1.8V or 3.0V is supported by the module automatically.
15 USIM2_DATA Data signal of USIM card.
16 USIM2_CLK USIM card clock signal.
17 USIM2_RST Reset signal of the USIM card.

Applications

LZ5x1 Series Hardware Design Guidelines

Circuit design

  • Place the SIM card connector near the module. Keep the trace length as less than 200 mm as possible.
  • Place a 2.2 μF decouple capacitor between USIM_VDD and GND, close to the SIM card connector.
  • Place a 10 to 20K pull-up resistor on the USIM_DATA to reduce EMI.
  • Place the RF bypass capacitors (33 pF) close to the SIM card connector on all signal traces (USIM_DATA, USIM_RST, and USIM_CLK) to improve EMI suppression.
  • Keep USIM card signals away from RF and VBAT traces. To avoid crosstalk between SIM_DATA and SIM_CLK, keep them away from each other.
  • In order to offer good ESD protection, it is recommended to add a TVS diode array with a parasitic capacitance of less than 15 pF. The ESD protection device should be placed as close to the SIM card connector as possible, and make sure the SIM card signal lines go through the ESD protection device first and then to the module.
  • For the design of SIM card hot-swapping, the USIM_DET is shorted to the ground when no card is inserted. When a card is inserted, USIM_DET floats and is pulled up by VDD_EXT. If you do not use USIM_DET, pull it up to VDD_EXT.

Network status indication

Pin description

Pin No. Signal Description
98 NET_MODE Indicate the module network registration. Quick blinking indicates the module is searching for the network. Slow blinking indicates the module is connected to the cloud.

Applications

NET_MODE is the current source so it should be connected to the negative terminal of the LED.

LZ5x1 Series Hardware Design Guidelines

I2C bus

Pin description

Pin No. Signal Description
41 I2C_SCL I2C serial clock line
42 I2C_SDA I2C serial data line

I2C is a simple serial communication bus protocol that uses just two bus wires, a serial data wire (SDA) and a serial clock wire (SCL). I2C is integrated into many ICs and allows devices to communicate directly with each other. Each device is recognized by a unique address to differentiate from other devices on the same I2C bus and can operate either as a transmitter or a receiver depending on its function.

Applications

The I2C bus must be pulled up to VDD_EXT.

LZ5x1 Series Hardware Design Guidelines

Headphone interface

Pin description

Pin No. Signal Description
33 HP_R Right channel output for headphone.
34 HP_L Left channel output for headphone.

Applications

  • The output power: 25mW@±1.8V on 32Ω load

  • The gain: -18 dB to +0 dB with 3 dB steps (4-bit programmable gain)

PCM interface

Pin description

Pin No. Signal Description
85 PCM_DIN PCM audio input
82 PCM_DOUT PCM audio output
84 PCM_SYNC PCM audio sync
83 PCM_CLK PCM audio clock signal

Applications

LZ5x1 Series Hardware Design Guidelines

The PCM and I2C are 1.8V. If the codec chip is 3.3V, a level converter is required.

LZ5x1 Series Hardware Design Guidelines

Charger interface

Pin No. Signal Description
67 ISENSE Measure the charge current.
72 VBAT_SENSE Measure battery voltage. Connect it close to the positive terminal of batteries to sense the battery voltage.
73 VDRV Enable the charger circuit.
31 USB_VBUS Detect charging voltage input.

Applications

  • Linear charger circuit diagram:

    LZ5x1 Series Hardware Design Guidelines
  • Discrete component circuit diagram:

    LZ5x1 Series Hardware Design Guidelines

Circuit design

  • Considering the thermal design, you can use a linear charger if the charge current is less than 0.7A. Otherwise, switching chargers are recommended.
  • To get an accurate charging current, ISENSE and VBAT_SENSE can be routed as a pseudo-differential mode (0.075 mm/0.075 mm/0.075 mm). Route the differential traces with ground shielding on the right and left sides.
  • Place the shunt resistor (0.068Ω±1%, 0.125W, 0805) close to the PNP triode. The trace width of the charger should not be less than 1 mm. The 4-Pin Land Pattern Design from UNISOC is recommended.
  • The copper pour for the anode (collector) of the PNP triode should not be less than 30 mm². It is recommended to connect the adjacent layers to the ground for better heat dissipation.
  • You can add an NTC thermistor within 1.5 mm around the PNP component to control temperature.

GPIO interface

Some pins can be used as GPIOs in OpenCPU mode.

For more information, see LZ5x1 Series Open CPU GPIO Configuration.

Antenna interface

Pin description

Pin No. Signal Description
96 ANT_BT/WIFI Bluetooth Low Energy or Wi-Fi antenna
3 ANT_MAIN LTE antenna

Antenna matching circuit

In order to achieve better RF performance, it is recommended to place the π-type matching components as close to the antenna as possible.

By default, the capacitors (C1/C2) are not mounted and a 0Ω resistor is mounted on L1.

LTE, Bluetooth Low Energy, and Wi-Fi antennas as well as GNSS passive antennas:

LZ5x1 Series Hardware Design Guidelines

RF layout

For MCU PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. A microstrip line is used for impedance control.

Microstrip line design on PCB

LZ5x1 Series Hardware Design Guidelines

Principles in RF layout design:

  • The distance between the RF pins and the RF connector should be as short as possible. All the right angle traces should be changed to 135° or curved ones.
  • The reference ground of RF traces should be complete. Add some ground vias around RF traces. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces.
  • The GND pins are adjacent to RF pins and should be fully connected to the ground.
  • There should be a distance between the pad connected to the signal pin and the ground plane.
  • Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω.

The following figure provides parameters used for impedance control. You can adjust the trace width properly to get the trace impedance closer to 50Ω.

LZ5x1 Series Hardware Design Guidelines

Antenna design requirements

  • The antenna should be kept away from components that are more likely to generate EMI, such as power source and data line.
  • To maximize the RF performance, the distance between the antenna and the PCB or mental materials should be at least 15 mm.
  • Make sure that the enclosure surrounding the antenna is not metal materials. Otherwise, the radiation performance might be degraded. It is recommended to hollow out the breakout board around the antenna area.

Antenna types

This module does not come with an antenna, so an external antenna is required. You can choose one from the external rubber antenna, helical antenna, FPC antenna with IPEX connector, and PCB antenna. The antenna type can be monopole, planar inverted-F antenna (PIFA), inverted-F antenna (IFA), loop, and more.

The following figure shows the common antennas.

  • Rubber antenna

    LZ5x1 Series Hardware Design Guidelines
  • FPC antenna with IPEX connector

    LZ5x1 Series Hardware Design Guidelines
  • Built-in FPC antenna

    LZ5x1 Series Hardware Design Guidelines
  • PCB antennas for Bluetooth

    LZ5x1 Series Hardware Design Guidelines

Reliability design

EMC and ESD suppression design guide

Electromagnetic compatibility (EMC) is one of the essential considerations in designing for signal integrity and power integrity.

  • When you design the peripheral circuit, have two times the width of the trace when routing signals close to each other to minimize noise coupling and generation.
  • Place decoupling capacitors close to voltage pins. Keep the high-frequency and high-speed circuits and sensitive circuits away from the edge of the PCB. To reduce crosstalk between signals, increase the spacing between the traces. Provide shielding for components that emit RFI and EMI waves to protect sensitive signals from interference.

Design considerations for ESD circuit protection.

  • Place ESD protection devices close to the critical signal I/Os, such as the SIM card, USB port, and TF card.
  • In PCB layout and design, make sure the metal shielding enclosure is fully connected to the ground.

PCB pad design

It is recommended to design the 64 pads placed in the middle of the PCB as per the dimensions specified in the structure diagram. Extend the 80 pads around the PCB to the module for over 0.3 mm and the other three sides of the pads for 0.05 mm.

Thermal design

The module generates heat when it works or might be affected by high-temperature components. The module design ensures good heat dissipation. When connecting the module to the PCB, connect the thermal pad to the ground properly to ensure thermal conduction and balance and better electrical performance.

  • Place the module away from the power supply and high-speed signals and protect the traces of sources of EMI.

  • Place the antenna and the coaxial cable that is used to connect the antenna and network interface controller (NIC) away from these sources of EMI.

  • Place the module away from components that generate a large amount of heat such as the CPU. Otherwise, the RF performance might be degraded.

Packing and manufacturing

Mechanical dimensions

The dimensions are 22.2 mm±0.35 (W) × 20.2 mm±0.35 (L) × 2.4 mm±0.15 (H), as shown below. The PCB thickness is 0.8 mm ±0.1 mm.

LZ5x1 Series Hardware Design Guidelines

The tolerances for dimensions of length and width, height, and PCB thickness are ±0.35 mm, ±0.15 mm, and ±0.1 mm respectively.

SMT package

LZ5x1 Series Hardware Design Guidelines

Stencil opening design

  • Stencil thickness: The stencil thickness of the area for the module should be partly stepped up to 0.18 mm–0.2 mm.
  • LCC pins: The stencil openings are shrunk inward by 0.1 mm, and moved outward by 1 mm along the direction of length. Along the width direction, the stencil openings are shrunk inward by 0.16 mm (each side by 0.08 mm) with a length of 1.4 mm (module’s lead length, avoiding solder beads), and are moved outward by 0.2 mm (each side by 0.1 mm) with a length of 2 mm (exposed on the areas outside of the bottom of the module leads to increase tinning).
  • LGA pins: The total opening area of the stencil should be 60% of the total. If it exceeds 60%, you can set a pitch of 0.3 mm.