TCS600U Series Hardware Design Guidelines

These guidelines are intended to serve as a reference when you develop with TCS600U modules. It helps you get an overall understanding of the product specifications and assists in developing IoT products and applications.

Background

Glossary

Abbreviation	Spelled-out
ESD	Electrostatic discharge
USB	Universal serial bus
UART	Universal asynchronous receiver-transmitter
SIM	Subscriber identification module
SPI	Serial peripheral interface
I2C	Inter-integrated circuit
I/O	Input/Output
GPIO	General-purpose input/output
TBD	To be determined
RTC	Real time clock
ADC	Analog-to-digital converter

Reference

• TCS600U Datasheet
• TCS600U Hardware Design Guidelines (This documentation)
• TCS600U Schematic Diagram
• TCS600U Open CPU GPIO Configuration
• LTE Cat.1 Serial Protocol
• LTE Cat.1 Open CPU Development

Product overview

TCS600U is an LTE Cat.1 cellular module developed by Tuya Smart. The TCS600U module consists of a highly integrated LTE Cat.1 chip UIS8910DM and peripheral circuits. It has a built-in LTE Cat.1 network communication protocol stack and library functions.

The TCS600U module is built around an Arm Cortex-A5 processor and Cat.1 bis modem and embedded with 64 MB NOR flash and 128 MB PSRAM. It provides a wide array of interfaces including USB, UART, SDIO, SPI, I2C, I2S, and ADC for supporting peripherals such as the display, camera, microphone, speaker, microSD card, and USIM card.

Models

Model	TCS600U
LTE FDD	Band 1, 3, 5, 8
LTE TDD	Band 34, 38, 39, 40, 41
VoLTE	Support
GNSS	Not supported
Bluetooth Low Energy 4.2	Not supported
Wi-Fi Scan	Not supported
Dimensions	21.9 mm × 22.9 mm

Features

Features	Description
Processor	Arm Cortex-A5 500 MHz microprocessor
Voltage	Operating voltage: 3.4V to 4.3V Typical operating voltage: 3.8V
LTE Cat.1 speed	Maximum download speed of 10 Mbps Maximum upload speed of 5 Mbps Maximum download speed of 8.2 Mbps Maximum upload speed of 3.4 Mbps
Interfaces	1 USB 2.0 interface 2 UART interfaces 3 I2C interfaces 1 PCM/I2C interface 1 SDIO interface 1 SPI interface 2 ADC interfaces 1 quad SPI flash interface
USB	USB 2.0, with a maximum data transfer speed of 400 Mbps. Used for AT command communication, data transmission, software debugging, and firmware update.
UART interfaces	UART1: A general-purpose UART used for AT command communication and data transmission. The maximum baud rate is 921600 bps. Auto-baud mode can detect 9600 bps and 115200 bps by default. Support hardware flow control (RTS/CTS). UART2 (multiplexing): Extended general-purpose UART. DBG_UART: Used to output AP logs. ZSP_UART (multiplexing): Used to output CP logs.
USIM card	1.8V and 3V supported
Display	SPI display in 320 × 240 pixel resolution at 30 fps
Camera	Support SPI/MIPI camera, up to 640 × 480 pixel resolution. The I/O interface supports 1.8V only.
Audio	1 digital audio interface 1 analog audio input 1 analog audio output
MicroSD card	Support
Antenna interface	LTE antenna with 50Ω characteristic impedance.
Operating temperature	Operation temperature range: -30°C to +75°C 1 Extended temperature range: -40°C to +85°C 2
Integration solutions	AT commands TuyaOS development Open CPU development
Software updates	USB update or OTA update
Package	Pin: A total of 106 pins, including LCC pins and LGA pins. Dimensions: 21.9 mm × 22.9 mm × 2.3 mm Weight: About 3.2g

Pin configuration and functions

TCS600U is equipped with a total of 106 pins, including 76 LCC pins and 30 LGA pins.

The pinout is as follows:

I/O parameters definition

Type	Description
IO	Input/Output
DI	Digital input
DO	Digital output
PI	Power input
PO	Power output
AI	Analog input
AO	Analog output
OD	Open drain output

Pin description

Pin No.	Pin name	I/O type	Description
1	SPI_CLK	DO	SPI1 clock signal output. It can be used as GPIO93 in OpenCPU mode.
2	SPI_DIN	DI	SPI1 data input. It can be used as GPIO12 in OpenCPU mode.
3	SPI_DOUT	DO	SPI1 data output. It can be used as GPIO11 in OpenCPU mode.
4	SPI_CS	DO	SPI1 chip select signal. It can be used as GPIO10 in OpenCPU mode.
5	USIM_CLK	DO	USIM card clock signal.
6	USIM_DATA	IO	USIM card data signal.
7	USIM_RST	DO	USIM card reset signal.
8	USIM_VDD	PO	Power supply for USIM card. Either 1.8V or 3.0V is supported by the module automatically. IOMAX = 50 mA.
9	USIM_CD	DI	USIM card hot-plug detection, which is disabled by default in the software. Pull this pin up to V_GLOBAL_1V8.
10	CAM_MCLK	DO	Camera MCLK output.
11	CAM_I2C_SCL	IO	Camera I2C clock signal, which can also be used as a general-purpose I2C interface.
12	CAM_I2C_SDA	IO	Camera I2C data signal. It can also be used as a general-purpose I2C interface or as GPIO17 in OpenCPU mode.
13	CAM_SPI_CLK	DI	Camera SPI clock input.
14	CAM_SPI_D0	DI	Camera SPI data input 0.
15	CAM_SPI_D1	DI	Camera SPI data input 1.
16	CAM_PWDN	DO	Camera power down.
17	CAM_VDD	PO	Analog power supply for camera, with voltage ranging from 1.6V to 3.2V, and defaulting to 1.8V. IOMAX = 100 mA. By default, the analog power is down after the module is powered on.
18	GND	-	Ground
19	ADC0	AI	Analog-to-digital converter (ADC). Input voltage: 0 to VBAT Channel: 0 Resolution: 11 Bits
20	ADC1	AI	Analog-to-digital converter (ADC). Input voltage: 0 to VBAT Channel: 1 Resolution: 11 Bits
21	SPK-	AO	Negative audio differential output, with no built-in power amplifier. It can drive a 32Ω receiver. An external power amplifier is required to connect to an 8Ω external speaker.
22	SPK+	AO	Positive audio differential output, with no built-in power amplifier. It can drive a 32Ω receiver. An external power amplifier is required to connect to an 8Ω external speaker.
23	MIC-	AI	Negative microphone input signal.
24	MIC+	AI	Positive microphone input signal.
25	MIC_BIAS	PO	Microphone bias voltage.
26	USB_DP	IO	Positive USB differential signal, which should have a 90Ω differential impedance.
27	USB_DM	IO	Negative USB differential signal, which should have a 90Ω differential impedance.
28	USB_VBUS	DI	Used to detect USB port insertion. Input voltage: 3.3V to 5.25V Vnorm = 5.0V Insertion of a USB device will charge and start up the module. As a result, the module cannot be shut down in this state.
29	VBAT	PI	Power supply for module. Supply voltage: 3.4V to 4.3V. Nominal voltage: 3.8V. The external power supply should output 2A. It is recommended to add a surge protector.
30	GND	-	Ground
31	MAIN_RXD	DI	The UART1 receives data.
32	MAIN_TXD	DO	The UART1 sends data.
33	MAIN_CTS	DO	DTE UART1 clear to send, connected to DTE’s CTS. It can be used as GPIO19 in OpenCPU mode.
34	MAIN_RTS	DI	DTE UART1 request to send, connected to DTE’s RTS. It can be used as GPIO18 in OpenCPU mode.
35	GND	-	Ground
36	VBAT	PI	Power supply for module. Supply voltage: 3.4V to 4.3V. Nominal voltage: 3.8V. The external power supply should output 2A. It is recommended to add a surge protector.
37	VBAT	PI	Power supply for module. Supply voltage: 3.4V to 4.3V. Nominal voltage: 3.8V. The external power supply should output 2A. It is recommended to add a surge protector.
38	GND	-	Ground
39	MAIN_DTR/SD_DATA0	DI/IO	Wake-up control, or SDIO data bit 0.
40	MAIN_RI/SD_DATA1	DO/IO	Main UART ring indicator, or SDIO data bit 1.
41	GND	-	Ground
42	BOOT	DI	Short this pin to V_GLOBAL_1V8 on startup will make the module enter download mode. Leaving this pin floating will start the module in normal mode.
43	GND	-	Ground
44	GND	-	Ground
45	GND	-	Ground
46	LTE_ANT	AIO	LTE antenna output, with 50Ω characteristic impedance.
47	GND	-	Ground
48	MAIN_DCD*/SD_CMD	DO/IO	Main UART data carrier detect, or SDIO signals.
49	WAKEUP_IN*/SD_DATA2	DI/IO	Wake-up control, or SDIO data bit 2.
50	AP_READY*/SD_DATA3	DI/IO	Detecting the sleep mode for application processor, or SDIO data bit 3.
51	W_DISABLE*	DI	Used to force the module into airplane mode. It can be used as GPIO22 in OpenCPU mode.
52	NET_MODE*	DO	Indicate the registered mobile network standard.
53	SLEEP_IND*	DO	Indicating the sleep mode, or UART2_TXD. It can be used as GPIO21 in OpenCPU mode.
54	STATUS*	DO	Indicating the module’s operating status, or UART2_RXD. It can be used as GPIO20 in OpenCPU mode.
55	NET_STATUS	DO	Indicate the module’s network registration mode, which applies when the module operates in self-processing mode.
56	I2C2_SDA	IO	I2C2 data signal. It can be used as GPIO15 in OpenCPU mode.
57	I2C2_SCL	IO	I2C2 clock signal. It can be used as GPIO14 in OpenCPU mode.
58	PCM_SYNC/SPI_FLASH_CS	DO	PCM data sync, or SPI_FLASH_CS.
59	PCM_DIN/SPI_FLASH_D0	DI/IO	PCM data input, or SPI_FLASH_D0.
60	PCM_DOUT/SPI_FLASH_D1	DO/IO	PCM data output, or SPI_FLASH_D1.
61	PCM_CLK/SPI_FLASH_CLK	DO	PCM audio clock signal, or SPI_FLASH_CLK.
62	LCD_TE	DO	LCD SPI frame sync signal
63	LCD_SPI_RS	DO	LCD SPI register select signal.
64	LCD_RST	DO	LCD SPI reset signal
65	LCD_SPI_CS	DO	LCD SPI chip select signal.
66	LCD_SPI_DOUT	DO	LCD SPI data signal.
67	LCD_SPI_CLK	DO	LCD SPI clock signal.
68	CAM_VDDIO	PO	Digital power supply for camera, with voltage ranging from 1.4V to 2.1V, and defaulting to 1.8V. IOMAX = 100 mA. By default, the digital power is down after the device is powered on.
69	I2C3_SDA/SPI_FLASH_D2	IO	I2C3 data signal, or SPI_FLASH_D2.
70	I2C3_SCL/SPI_FLASH_D3	IO	I2C3 clock signal, or SPI_FLASH_D3. It can be used as GPIO5 in OpenCPU mode.
71	DBG_TXD	DO	Debugging interface, used to output AP logs.
72	DBG_RXD	DI	Debugging interface, used to receive commands.
73	GND	-	Ground
74	POWER_KEY	DI	Control module power on/off, with an internal pull-up to VBAT.
75	RESET	DI	Reset module, active low, with an internal pull-up to VBAT.
76	V_GLOBAL_1V8	PO	Provide fixed 1.8V output. IOMAX = 50 mA. This pin is automatically enabled upon startup and cannot be disabled. It can be used as pull-up power for peripherals.
77 to 92	GND	-	Ground
113	RESERVED	-	Reserved pin
120	CAM_RST	DO	Camera reset signal.
129	RESERVED	-	Reserved pin
131	RESERVED	-	Reserved pin
132	SD_CLK	DO	SDIO clock signal.
133	VMMC_VDD	PO	Power supply for SDIO, defaulting to 3.1V. IOMAX = 150 mA.
134	LCD_VDDIO	PO	Digital power supply for LCD, defaulting to 1.8V. IOMAX = 200 mA.
136	RESERVED	-	Reserved pin
138	LCD_AVDD	PO	Analog power supply for LCD, defaulting to 3.0V. IOMAX = 150 mA.
143	RESERVED	-	Reserved pin
145	USIM2_RST	DO	USIM2 reset signal.
146	USIM2_DATA4	IO	USIM2 data signal.
147	USIM2_CLK4	DO	USIM2 clock signal.
148	USIM2_VDD4	PO	Power supply for USIM2 card. Either 1.8V or 3.0V is supported by the module automatically. IOMAX = 50 mA.

Power supply

Power and ground pins

TCS600U can be powered by a battery or an external power supply. The ground pin and signal ground pin must be connected to the ground plane on the PCB. Otherwise, the overall performance of the module might be affected.

Pin No.	Pin name	Description	Min	Typical	Max	Unit
29, 36, 37	VBAT	Module power input.	3.4	3.8	4.3	V
18, 30, 35, 38, 41, 43, 44, 45, 47, 73, 77 to 92	GND	GND	-	-	-	-

Power supply requirements

• The supply voltage of the TCS600U module ranges from 3.4V to 4.3V, with a peak current of 2A.

  • If the difference between the input and output voltage is small, you can use a low-dropout (LDO) regulator to maintain the required system voltage.
  • If the difference between the input and output voltage is large, you can use a DC-to-DC converter to regulate the output voltage.

• Voltage drop: When the module is working, make sure its input voltage will never drop below 3.4V and the ripple voltage is less than 300 mV.
  

• Voltage regulator and filter capacitor:

  • Capacitors used for the voltage regulation circuit of a power supply: 100 μF × 2 (equivalent series resistance = 0.7Ω)
  • Filter capacitors: 0.1 μF, 33 pF, and 10 pF

• Electrostatic discharge protection: Add a TVS diode near the VBAT input pin to improve surge voltage withstand capability.

• In principle, star routing topology is required. The longer the VBAT trace is, the wider it should be.

• If the module is powered by a battery, you can enable low voltage (less than 3.38V) shutdown, with consideration of the power of other components on the backplane. Otherwise, the module might not be powered on due to battery over-discharge.

• A reference circuit is illustrated in the following figure.

  

Power on/off and reset

Pin description

Pin No.	Pin name	Description
74	POWER_KEY	Control module power on/off, with an internal pull-up to VBAT.
75	RESET	Reset module, active low, with an internal pull-up to VBAT.

Applications

• Power on: Pull down POWER_KEY for at least 1.5 seconds. The module will start up. If the VBAT voltage exceeds the startup voltage of 3.3V, the module will continue booting until the process is completed. Otherwise, the module will shut down. After the module starts up, POWER_KEY can be released. You can detect the voltage on V_GLOBAL_1V8 to determine whether startup is completed.

  

• Auto power-on: If you want the module to be powered on whenever a power source is connected and do not need the shutdown feature, you can pull down POWER_KEY to ground.

• Reset: The module will be reset after the RESET pin is driven to a low level for at least 35 ms and then pulled up or left floating.

  

• Power off: In power-on state, pull down POWER_KEY for at least 1.5 seconds, and the module will shut down.

• An open collector is recommended to control the module’s pin, as shown in the following schematics.

  • Power-on circuit

    

  • Reset circuit

    

UART

Pin description

The module provides four UART interfaces:

• UART 1: used to interface with your MCU through AT commands or Tuya’s serial communication protocol. The baud rate is 115200 bps by default.

• UART 2: used to connect to peripheral devices.

• Debug interface: used to receive debugging commands and output AP logs. It is recommended to reserve test points during the development stage.

• ZSP interface: used to output CP logs.

  Pin No.	Pin name	Description
  32	MAIN_TXD	UART 1 receives data. Auto-baud mode can detect 9600 bps and 115200 bps.
  31	MAIN_RXD	UART 1 sends data. Auto-baud mode can detect 9600 bps and 115200 bps.
  33	MAIN_CTS	DTE UART 1 clear to send.
  34	MAIN_RTS	DTE UART 1 request to send.
  54	SLEEP_IND	Reused as UART2_TXD to send data.
  53	STATUS	Reused as UART2_RXD to receive data.
  71	DBG_TXD	Debugging interface, used to output AP logs.
  72	DBG_RXD	Debugging interface, used to receive commands.
  51	W_DISABLE	Reused as ZSP_UART_TXD to output CP logs.

Applications

The module provides 1.8V UART interfaces. A level translator should be used if the application is equipped with a 3.3V or 5V UART interface.

Alternatively, use a triode to translate voltage levels.

USB

Pin description

The USB interface conforms to USB 2.0 specifications with a maximum data transfer speed of 480 Mbps and can be used to download code to the module and send AT commands.

Pin No.	Pin name	Description
28	USB_VBUS	Used to detect USB port insertion. Input voltage: 3.3V to 5.25V Vnorm = 5.0V Insertion of a USB device will charge and start up the module. As a result, the module cannot be turned off in this state.
26	USB_DP	USB high-speed differential transceiver (positive). It can be used to download code to the module.
27	USB_DM	USB high-speed differential transceiver (negative). It can be used to download code to the module.
42	USBBOOT	Pulling up this pin to V_GLOBAL_1V8 before power-on will enable the module to enter USB download mode.

Applications

• MCU solutions

  

• Micro-USB cable

  

Circuit design

• Pull up USBBOOT to VDD_EXT to make the module enter USB download mode.

• Route the USB signal traces as parallel differential pairs with equal lengths.

• The trace impedance of the USB differential pair should be 90Ω.

• Do not route signal traces under the power supply, RF signal traces, and other sensitive signal traces. It is important to route the USB differential traces in the inner layer with ground shielding on not only the upper and lower layers but also the right and left sides.

• Connect a common mode choke between the MCU and module in series to improve EMI suppression.

• VBUS is used to detect the presence of the USB bus. If the USB port on your MCU does not support the suspend mode, you can disconnect VBUS to make the module enter sleep mode.

  

• Considering connection to micro-USB devices, place the TVS diode as close to the USB port as possible with a parasitic capacitance of less than 2 pF.

Download and debug

• When the MCU communicates with the module through the USB port, it is recommended to use zero-ohm resistors to reserve a test point or micro-USB port for firmware updates and debugging. Zero-ohm resistors should be adopted with a pad-sharing design.

• Before the module starts up, pull up USB_BOOT to V_GLOBAL_1V8 to start the module in download mode.

• It is recommended to reserve USB_BOOT and V_GLOBAL_1V8 as test points for downloading and debugging.

• After the module enters the download mode, the port will be displayed in the Device Manager on your computer.

USIM card

Pin description

The module provides two SIM card interfaces:

Pin No.	Pin name	Description
5	USIM_CLK	USIM card clock signal.
6	USIM_DATA	USIM card data signal.
7	USIM_RST	USIM card reset signal.
8	USIM_VDD	Power supply for USIM card. Either 1.8V or 3.0V is supported by the module automatically.
9	USIM_CD	USIM card insertion detection. If it is unused, pull it up to VDD_EXT.
145	USIM2_RST*	USIM2 reset signal. It can be used as GPIO31 in OpenCPU mode.
146	USIM2_DATA*	USIM2 data signal. It can be used as GPIO30 in OpenCPU mode.
147	USIM2_CLK*	USIM2 clock signal. It can be used as GPIO29 in OpenCPU mode.
148	USIM2_VDD*	Power supply for USIM2 card. Either 1.8V or 3.0V is supported by the module automatically. IOMAX = 50 mA.

Applications

Circuit design

• Place the USIM card connector near the module. Keep the trace length as less than 200 mm as possible.
• Place a 100 nF filter capacitor between USIM_VDD and GND, close to the card connector.
• Place a 10 to 20K pull-up resistor on the USIM_DATA to reduce EMI.
• Place the RF bypass capacitors (33 pF) close to the USIM card connector on all signal traces (USIM_DATA, USIM_RST, and USIM_CLK) to reduce RF interference.
• Keep the USIM card signal traces away from RF and VBAT traces. To avoid crosstalk between USIM_CLK and USIM_DATA, keep them away from each other.
• In order to offer good ESD protection, it is recommended to add a TVS diode array with a parasitic capacitance of less than 15 pF. The ESD protection device should be placed as close to the SIM card connector as possible, and make sure the SIM card signal lines go through the ESD protection device first and then to the module.
• For the design of USIM card hot-plug, the USIM_CD is shorted to the ground when no card is inserted. When a card is inserted, USIM_CD floats and is pulled up by V_GLOBAL_1V8. If you do not use hot-plug USIM card connectors, keep USIM_CD floating.

SD card

Pin description

The module provides one SD 2.0 interface. GPIO pins are reused to enable access to memory cards compliant with SD 2.0 and SDIO 1.1 standards.

Pin No.	Pin name	I/O type	Power supply domain	Description
132	SD_CLK	DO		SD card SDIO clock signal.
48	MAIN_DCD/SD_CMD	IO	VMMC	SD card SDIO command signal.
39	MAIN_DTR/SD_DATA0	IO	VMMC	SD card SDIO data bit 0.
40	MAIN_RI/SD_DATA1	IO	VMMC	SD card SDIO data bit 1.
49	WAKEUP_IN/SD_DATA2	IO	VMMC	SD card SDIO data bit 2.
50	AP_READY/SD_DATA3	IO	VMMC	SD card SDIO data bit 3.
133	VMMC_VDD	PO		SD card SDIO bus pull-up power.

Applications

Circuit design

• The maximum output current of VMMC_VDD is 150 mA. If the current consumption of the SD card exceeds 150 mA, an external power supply is needed.
• Connect a 22Ω resistor between the SD_CLK and SD signal trace in series to reduce RF interference.
• Reserve a pad for 33 pF capacitor on the signal trace to reduce RF interference.
• Reserve a pad for a pull-up resistor (100 kΩ is recommended) on the SD signal trace for increasing the stability of the bus line. VMMC_VDD is the pull-up power supply.
• SD_CLK needs ground shielding. Surround SD signal traces with total grounding to prevent any possible crosstalk and noise coupling from other signal sources.
• It is recommended to keep the same trace length for SD_CLK, SD_DATA[0:3], and SD_CMD, with a length difference of less than 1 mm. The total length should not exceed 50 mm.
• In order to offer good ESD protection, it is recommended to add a TVS diode array with a parasitic capacitance of less than 15 pF. The ESD protection device should be placed as close to the SIM card connector as possible, and make sure the SIM card signal lines go through the ESD protection device first and then to the module.

Network status indication

Description of the NET_STATUS interface.

Pin No.	Pin name	Description
52	NET_MODE*	The mobile network standard.
55	NET_STATUS	Indicate the network status, which applies when the module operates in self-processing mode.

Applications

SPI interface

Pin description

Pin No.	Pin name	I/O type	Power supply domain	Description
1	SPI_CLK	DO	V_PAD_1V8_RTC	SPI1 clock signal output
2	SPI_DIN	DI	V_PAD_1V8_RTC	SPI1 data input
3	SPI_DOUT	DO	V_PAD_1V8_RTC	SPI1 data output
4	SPI_CS	DO	V_PAD_1V8_RTC	SPI1 chip select signal

Applications

The SPI on TCS600U only supports the controller mode.

The voltage of the SPI interface is 1.8V. Therefore, a level translator between the module and MCU should be used if the system voltage of the MCU is 3.3V.

A reference circuit is illustrated in the following figure.

I2C bus

Pin description

The module provides three I2C interfaces.

Pin No.	Pin name	I/O type	Power supply domain	Description
11	CAM_I2C_SCL	IO	V_PAD_1V8	Camera I2C clock signal
12	CAM_I2C_SDA	IO	V_PAD_1V8	Camera I2C data signal
56	I2C2_SDA	IO	V_PAD_1V8	I2C2 data signal
57	I2C2_SCL	IO	V_PAD_1V8	I2C2 clock signal
69	I2C3_SDA	IO	V_PAD_1V8	I2C3 data signal
70	I2C3_SCL	IO	V_PAD_1V8	I2C3 clock signal

I2C is a simple serial communication bus protocol that uses just two bus wires, a serial data wire (SDA) and a serial clock wire (SCL). I2C is integrated into many ICs and allows devices to communicate directly with each other. Each device is recognized by a unique address to differentiate from other devices on the same I2C bus and can operate either as a transmitter or a receiver depending on its function.

Applications

The I2C bus must be pulled up to V_GLOBAL_1V8.

The voltage of the I2C bus is 1.8V. To connect to a 3.3V or 5V I2C device, a level translator is required.

PCM interface

The module provides a digital PCM interface. In OpenCPU mode, you can use an external codec by reusing the PCM and SPI flash pins.

Pin description

Pin No.	Pin name	I/O type	Power supply domain	Description
58	PCM_SYNC/SPI_FLASH_CS	DO	V_PAD_1V8	PCM audio sync
59	PCM_DIN/SPI_FLASH_D0	DI	V_PAD_1V8	PCM audio input
60	PCM_DOUT/SPI_FLASH_D1	DO	V_PAD_1V8	PCM audio output
61	PCM_CLK/SPI_FLASH_CLK	DO	V_PAD_1V8	PCM audio clock signal

Applications

The PCM and I2C are 1.8V. If the codec chip is 3.3V, a level converter is required.

SPI flash

The module has a built-in 64 MB NOR flash. If it is not sufficient for your applications, you can add an external SPI flash. This interface can be reused as PCM.

Pin description

Pin No.	Pin name	I/O type	Power supply domain	Description
61	PCM_CLK/SPI_FLASH_CLK	DO	V_PAD_1V8	Flash SPI clock signal
58	PCM_SYNC/SPI_FLASH_CS	DO	V_PAD_1V8	Flash SPI chip select signal
59	PCM_DIN/SPI_FLASH_D0	IO	V_PAD_1V8	Flash SPI data bit 0
60	PCM_DOUT/SPI_FLASH_D1	IO	V_PAD_1V8	Flash SPI data bit 1
69	I2C3_SDA/SPI_FLASH_D2	IO	V_PAD_1V8	Flash SPI data bit 2
70	I2C3_SCL/SPI_FLASH_D3	IO	V_PAD_1V8	Flash SPI data bit 3

Applications

LCD SPI

The module provides a dedicated SPI to drive an LCD.

• The maximum resolution for SPI display can be 320 × 240 pixels at 30 fps.
• Built-in image processing.
• Supported formats: YUV 4:2:0, YUV 4:2:2, RGB 565, and ARGB 8888.
• Currently, only support 4-wire, 8-bit, 1-channel LCD.
• Support 1.8V/2.8V LCD.

Pin description

Pin No.	Pin name	I/O type	Power supply domain	Description
62	LCD_TE	DO	V_LCD	LCD SPI frame sync signal
63	LCD_SPI_RS	DO	V_LCD	LCD SPI register select
64	LCD_RST	DO	V_LCD	LCD SPI reset signal
65	LCD_SPI_CS	DO	V_LCD	LCD SPI chip select signal
66	LCD_SPI_DOUT	DO	V_LCD	LCD SPI data signal
67	LCD_SPI_CLK	DO	V_LCD	LCD SPI clock signal
134	LCD_VDDIO	PO		Digital power supply for LCD, defaulting to 1.8V. IOMAX = 200 mA.
138	LCD_AVDD	PO		Analog power supply for LCD, defaulting to 3.0V. IOMAX = 150 mA.

Applications

Circuit design

• Reserve a resistor-capacitor circuit to reduce RF interference.
• VBAT is the positive power supply of the LCD backlight. Power design is based on the requirements of the LCD.
• The brightness of the backlight is adjusted by PWM duty cycle.
• The R74 resistor is adjusted based on the turn-on current flowing through the LCD backlight.

Camera SPI

The module provides a camera SPI input interface for scanning QR code and taking photos. Video shooting is not supported.

• The maximum resolution can be 640 × 480 pixels.
• Supported formats: YUV 422, Y 420, RAW 8, and RAW 10.
• Integrated with GC0310 driver.

Pin description

Pin No.	Pin name	I/O type	Power supply domain	Description
10	CAM_MCLK	DO	V_PAD_1V8	Camera MCLK output.
11	CAM_I2C_SCL	DO	V_PAD_1V8	Camera I2C clock signal
12	CAM_I2C_SDA	IO	V_PAD_1V8	Camera I2C data signal
13	CAM_SPI_CLK	DI	V_PAD_1V8	Camera SPI clock input.
14	CAM_SPI_D0	DI	V_PAD_1V8	Camera SPI data input 0.
15	CAM_SPI_D1	DI	V_PAD_1V8	Camera SPI data input 1.
16	CAM_PWDN	DO	V_PAD_1V8	Camera shutdown signal.
120	CAM_RST	DO	V_PAD_1V8	Camera reset signal.
17	CAM_VDD	PO		Analog power supply for camera, with voltage ranging from 1.6V to 3.2V, and defaulting to 1.8V. IOMAX = 100 mA. By default, the analog power is down after the module is powered on.
68	CAM_VDDIO	PO		Digital power supply for camera, with voltage ranging from 1.4V to 2.1V, and defaulting to 1.8V. IOMAX = 100 mA. By default, the digital power is down after the device is powered on.

Applications

Circuit design

• Connect a 33Ω resistor and a 33 pF capacitor in series on the CAM signal trace to reduce RF interference.

• Place the filter capacitor on AVDD, DVDD, and DOVDD close to the connector.

• Keep camera signal traces away from RF and VBAT traces. This is especially crucial for clock and signal traces.

• Surround the clock and signal traces with ground to reduce RF interference.

• Surround the analog power supply CAM_VDD with ground. CAM_VDD powers the analog signals of the camera.

Microphone

The module provides an analog audio input interface.

Pin description

Pin No.	Pin name	I/O type	Description
23	MIC-	AI	Negative microphone input signal.
24	MIC+	AI	Positive microphone input signal.
25	MIC_BIAS	PO	Microphone bias voltage.

Applications

Circuit design

• Route the MIC+ and MIC- signal traces as parallel differential pairs with equal lengths.

• Place 33 pF and 10 pF filter capacitors near the microphone to reduce EMI.

• Place a TVS protector near the microphone to provide immunity to electrostatic discharge (ESD) and voltage surges.

Speaker

The module provides an analog audio output interface.

Pin description

Pin No.	Pin name	I/O type	Description
21	SPK-	AI	Negative audio differential output, with no built-in power amplifier. It can drive a 32Ω receiver. An external power amplifier is required to connect to an 8Ω external speaker.
22	SPK+	AI	Positive audio differential output, with no built-in power amplifier. It can drive a 32Ω receiver. An external power amplifier is required to connect to an 8Ω external speaker.

Applications

The audio output directly drives a 32Ω receiver, without a built-in power amplifier.

The reference circuit for adding a power amplifier.

Circuit design

• Route the SPK+ and SPK- signal traces as parallel differential pairs with equal lengths.

• Place 33 pF and 10 pF filter capacitors near the microphone to reduce EMI.

• Place a TVS protector near the speaker to provide immunity to electrostatic discharge (ESD) and voltage surges.

ADC

The module provides two ADC input interfaces.

Pin description

Pin No.	Pin name	I/O type	Description
19	ADC0	AI	Analog-to-digital converter (ADC). Input voltage: 0 to VBAT Channel: 0 Resolution: 11 Bits
20	ADC1	AI	Analog-to-digital converter (ADC). Input voltage: 0 to VBAT Channel: 0 Resolution: 11 Bits

ADC performance

Parameter	Condition	Min Value	Typical value	Max value	Unit
Resolution	-	-	11	-	Bit
Input voltage range	Input scale ratio = 1:1	0	-	1.25	V
	Input scale ratio = 1.92:1	0	-	2.4	V
	Input scale ratio = 1.92:1	0	-	2.4	V
	Input scale ratio = 2.56:1	0	-	3.2	V
	Input scale ratio = 4:1	0	VBAT	5	V
Precision	Input scale ratio = 1:1	-	10	-	mV
	Input scale ratio = 4:1 Input 3.6V to 4.2V	-	20	-	mV
Conversion time	-	-	50	-	µs

Circuit design

• The ADC interface should not accept an input voltage without a power supply from VBAT.
• The input voltage limit for the ADC is 5V.
• The default scale of the ADC is 0 to VBAT. If the input voltage exceeds VBAT, it can cause unacceptable errors in ADC measurements.
• You can set the scale in the software to adjust ADC measurement accuracy.

MAIN_RI and MAIN_DTR

Pin description

Pin No.	Pin name	I/O type	Description
39	MAIN_DTR	DI	Wake up control.
40	MAIN_RI	DO	UART1 ring indicator.

MAIN_RI

In AT mode or MCU integration mode, when the module sends packets through the main UART or USB port, MAIN_RI indicates the status.

State	MAIN_RI signal
IDLE	High level.
AT mode	When an unsolicited result code (URC) is returned, MAIN_RI is pulled down and kept low for 120 ms and then returned high.
MCU integration	When an unsolicited result code (URC) is returned, MAIN_RI is pulled down and kept low for 60 ms and then returned high. You can use the serial communication command to set the low-level hold time between 10 ms and 10s.

MAIN_DTR

When the module is in sleep mode, MAIN_DTR can be used to wake up the module.

State	MAIN_RI signal
Sleep	High level. Pull-down does not put the module to sleep.
WAKEUP	The host pulls down MAIN_DTR to wake up the module.

Antenna interface

Pin description

Pin No.	Pin name	Description
46	LTE_ANT	LTE Antenna

Antenna matching circuit

In order to achieve better RF performance, it is recommended to place the π-type matching components as close to the antenna as possible.

By default, the capacitors (C1/C2) are not mounted and a 0Ω resistor is mounted on L1.

LTE antenna:

RF layout

For MCU PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. A microstrip line is used for impedance control.

Microstrip line design on PCB

Principles in RF layout design:

• The distance between the RF pins and the RF connector should be as short as possible. All the right angle traces should be changed to 135° or curved ones.
• The reference ground of RF traces should be complete. Add some ground vias around RF traces. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces.
• The GND pins are adjacent to RF pins and should be fully connected to the ground.
• There should be a distance between the pad connected to the signal pin and the ground plane.
• Use an impedance simulation tool to control the characteristic impedance of RF traces as 50Ω.
• If you use an external antenna, add a TVS diode to prevent ESD damage. The TVS diode’s junction capacitance (Cj in pF) should be less than 0.5 pF.

The following figure provides parameters used for impedance control. You can adjust the trace width properly to get the trace impedance closer to 50Ω.

Antenna design requirements

• The antenna should be kept away from components that are more likely to generate EMI, such as power source and data line.
• To maximize the RF performance, the distance between the antenna and the PCB or mental materials should be at least 15 mm.
• Make sure that the enclosure surrounding the antenna is not metal materials. Otherwise, the radiation performance might be degraded. It is recommended to hollow out the breakout board around the antenna area.

Antenna types

This module does not come with an antenna, so an external antenna is required. You can choose one from the external rubber antenna, helical antenna, FPC antenna with IPEX connector, and PCB antenna. The antenna type can be monopole, planar inverted-F antenna (PIFA), inverted-F antenna (IFA), loop, and more.

The following figure shows the common antennas.

• Rubber antenna

  

• FPC antenna with IPEX connector

  

• Built-in FPC antenna

  

Reliability design

EMC and ESD suppression design guide

Electromagnetic compatibility (EMC) is one of the essential considerations in designing for signal integrity and power integrity.

• When you design the peripheral circuit, have two times the width of the trace when routing signals close to each other to minimize noise coupling and generation.
• Place decoupling capacitors close to voltage pins. Keep the high-frequency and high-speed circuits and sensitive circuits away from the edge of the PCB. To reduce crosstalk between signals, increase the spacing between the traces. Provide shielding for components that emit RFI and EMI waves to protect sensitive signals from interference.

Design considerations for ESD circuit protection.

• Place ESD protection devices close to the critical signal I/Os, such as the SIM card, USB port, and TF card.
• In PCB layout and design, make sure the metal shielding enclosure is fully connected to the ground.

PCB pad design

It is recommended to design the 64 pads placed in the middle of the PCB as per the dimensions specified in the structure diagram. Extend the 80 pads around the PCB to the module for over 0.3 mm and the other three sides of the pads for 0.05 mm.

Thermal design

The module generates heat when it works or might be affected by high-temperature components. The module design ensures good heat dissipation. When connecting the module to the PCB, connect the thermal pad to the ground properly to ensure thermal conduction and balance and better electrical performance.

Packing and manufacturing

Mechanical dimensions

TCS600U is equipped with a total of 106 pins, including 76 LCC pins and 30 LGA pins.

The dimensions are 21.9 mm±0.35 (W) × 22.9 mm±0.35 (L) × 2.4 mm±0.15 (H), as shown below. The PCB thickness is 0.8 mm±0.1 mm.

SMT package

Stencil opening design

• Stencil thickness: The stencil thickness of the area for the module should be partly stepped up to 0.18 mm–0.2 mm.
• LCC pins: The stencil openings are shrunk inward by 0.1 mm, and moved outward by 1 mm along the direction of length. Along the width direction, the stencil openings are shrunk inward by 0.16 mm (each side by 0.08 mm) with a length of 1.4 mm (module’s lead length, avoiding solder beads), and are moved outward by 0.2 mm (each side by 0.1 mm) with a length of 2 mm (exposed on the areas outside of the bottom of the module leads must get increased tinning).
• LGA pins: The total opening area of the stencil should be 60% of the pad. If it exceeds 60%, you can set a pitch of 0.3 mm.